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PD - 94325A
RADIATION HARDENED POWER MOSFET SURFACE MOUNT(SMD-2)
Product Summary
Part Number IRHE57133SE Radiation Level 100K Rads (Si) RDS(on) 0.13
IRHE57133SE JANSR2N7500U5 130V, N-CHANNEL
REF: MIL-PRF-19500/707
5
TECHNOLOGY
ID QPL Part Number 9.0A JANSR2N7500U5
LCC-18
International Rectifier's R5 TM technology provides high performance power MOSFETs for space applications. These devices have been characterized for Single Event Effects (SEE) with useful performance up to an LET of 80 (MeV/(mg/cm2)). The combination of low RDS(on) and low gate charge reduces the power losses in switching applications such as DC to DC converters and motor control. These devices retain all of the well established advantages of MOSFETs such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters.
Features:
n n n n n n n n n
Single Event Effect (SEE) Hardened Ultra Low RDS(on) Low Total Gate Charge Simple Drive Requirements Ease of Paralleling Hermetically Sealed Surface Mount Ceramic Package Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 12V, TC = 25C ID @ VGS = 12V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current A Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy A Avalanche Current A Repetitive Avalanche Energy A Peak Diode Recovery dv/dt A Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight For footnotes refer to the last page 9.0 6.0 36 25 0.2 20 56 9.0 2.5 6.6 -55 to 150 300 (for 5s) 0.42 (Typical)
Pre-Irradiation
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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05/06/04
IRHE57133SE, JANSR2N7500U5
Pre-Irradiation
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS /T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage g fs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
130 -- -- 2.5 5.0 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.16 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6.1 -- -- 0.13 4.5 -- 10 25 100 -100 48 16 18 25 100 35 40 -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 12V, ID = 6.0A A
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
nA nC
VDS = VGS, ID = 1.0mA VDS > 15V, IDS = 6.0A A VDS= 104V ,VGS=0V VDS = 104V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS =12V, ID = 9.0A VDS = 65V VDD = 65V, ID = 9.0A, VGS =12V, RG = 7.5
ns
nH
Measured from the center of drain pad to center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
Ciss C oss C rss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
1020 306 22
-- -- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD trr Q RR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 9.0 36 1.5 250 1.5
Test Conditions
A
V nS C Tj = 25C, IS = 9.0A, VGS = 0V A Tj = 25C, IF = 9.0A, di/dt 100A/s VDD 25V A
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC RthJ-PCB Junction-to-Case Junction-to-PC board
Min Typ Max
-- -- -- 19 5.0 --
Units
C/W
Test Conditions
soldered to a copper-clad PC board
Note: Corresponding Spice and Saber models are available on International Rectifier Website. For footnotes refer to the last page
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Radiation Characteristics
IRHE57133SE, JANSR2N7500U5
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25C, Post Total Dose Irradiation AA
Parameter
BVDSS VGS(th) IGSS IGSS IDSS RDS(on) RDS(on) VSD Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source On-State Resistance (TO-3) Static Drain-to-Source On-State Resistance (LCC-18) Diode Forward Voltage
Min
130 2.0 -- -- -- -- -- --
100K Rads (Si)
Max
-- 4.5 100 -100 10 0.111
Units
V nA A V
Test Conditions
VGS = 0V, ID = 1.0mA VGS = VDS, ID = 1.0mA VGS = 20V V GS = -20V VDS=104V, VGS=0V VGS = 12V, ID = 6.0A VGS = 12V, ID = 6.0A VGS = 0V, ID = 9.0A
0.13 1.5
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion Br I Au LET MeV/(mg/cm2)) 36.7 59.8 82.3 Energy (MeV) 309 341 350 VDS (V) Range (m) @VGS=0V @VGS=-5V @VGS=-10V @VGS=-15V @VGS=-20V 39.5 130 130 130 130 130 32.5 130 130 130 100 50 28.4 130 120 30 -- --
150 120 VDS 90 60 30 0 0 -5 -10 VGS -15 -20 Br I Au
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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IRHE57133SE, JANSR2N7500U5
Pre-Irradiation
100
I D , Drain-to-Source Current (A)
10
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
100
10
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
1
1
5.0V
0.1
5.0V
0.01 0.1
20s PULSE WIDTH TJ = 25 C
10 100
1
VDS , Drain-to-Source Voltage (V)
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 9.0A
I D , Drain-to-Source Current (A)
TJ = 150 C
10
2.0
1.5
TJ = 25 C
1.0
1
0.5
0.1 5.0
V DS = 15 50V 20s PULSE WIDTH 6.0 7.0 8.0 9.0 10.0
0.0 -60 -40 -20
VGS = 12V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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Pre-Irradiation
IRHE57133SE, JANSR2N7500U5
2400
2000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 9.0A
16
VDS = 104V VDS = 65V VDS = 26V
C, Capacitance (pF)
1600
Ciss
1200
12
Coss
8
800
400
Crss
4
0
1
10
100
0
FOR TEST CIRCUIT SEE FIGURE 13
0 10 20 30 40 50
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
ID, Drain-to-Source Current (A)
10
TJ = 150 C
10
100s 1ms
TJ = 25 C
1
1 Tc = 25C Tj = 150C Single Pulse 1 10 100
10ms
0.1 0.2
V GS = 0 V
0.6 1.0 1.4 1.8 2.2
0.1
VSD ,Source-to-Drain Voltage (V)
1000
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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5
IRHE57133SE, JANSR2N7500U5
Pre-Irradiation
10.0
VDS VGS
RD
8.0
ID , Drain Current (A)
RG VGS
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-V DD
6.0
4.0
Fig 10a. Switching Time Test Circuit
2.0
VDS 90%
0.0
25
50
TC , Case Temperature ( C)
75
100
125
150
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
D = 0.50 0.20 0.10 0.05 0.02 0.01 PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
1
0.1
SINGLE PULSE (THERMAL RESPONSE)
0.01 0.00001
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Pre-Irradiation
IRHE57133SE, JANSR2N7500U5
120
EAS , Single Pulse Avalanche Energy (mJ)
TOP
100
15V
BOTTOM
ID 4.0A 5.7A 9.0A
VDS
L
DRIVER
80
RG
D.U.T.
IAS tp
+ - VDD
60
A
VGS 20V
0.01
40
Fig 12a. Unclamped Inductive Test Circuit
20
0
25
V(BR)DSS tp
Starting TJ , Junction Temperature ( C)
50
75
100
125
150
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
12 V
QGS
QGD
VGS
3mA
D.U.T.
+ V - DS
VG
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRHE57133SE, JANSR2N7500U5
Pre-Irradiation
Footnotes:
A Repetitive Rating; Pulse width limited by
maximum junction temperature. A VDD = 50V, starting TJ = 25C, L=1.4mH Peak IL = 9.0A, VGS = 12V A ISD 9.0A, di/dt 270A/s, VDD 130V, TJ 150C
A Pulse width 300 s; Duty Cycle 2% A Total Dose Irradiation with VGS Bias.
12 volt VGS applied and V DS = 0 during irradiation per MIL-STD-750, method 1019, condition A. A Total Dose Irradiation with VDS Bias. 104 volt VDS applied and VGS = 0 during irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions -- LCC-18
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 05/04
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